The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2022

Filed:

Oct. 09, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Gil Horovitz, Emek-Hefer, IL;

Sharon Malevsky, Tel-Aviv, IL;

Evgeny Shumaker, Nesher, IL;

Igal Kushnir, Hod-Hasharon, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); H04B 1/00 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0992 (2013.01); H04B 1/0082 (2013.01); H03L 2207/50 (2013.01);
Abstract

Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency f. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency f. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fthat is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.


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