The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2022
Filed:
Nov. 28, 2018
International Business Machines Corporation, Armonk, NY (US);
Andrew S. Cassidy, San Jose, CA (US);
Rathinakumar Appuswamy, San Jose, CA (US);
John V. Arthur, Mountain View, CA (US);
Pallab Datta, San Jose, CA (US);
Michael V. Debole, Poughkeepsie, NY (US);
Steven K. Esser, San Jose, CA (US);
Myron D. Flickner, San Jose, CA (US);
Dharmendra S. Modha, San Jose, CA (US);
Hartmut Penner, San Jose, CA (US);
Jun Sawada, Austin, TX (US);
Brian Taba, Cupertino, CA (US);
INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);
Abstract
A device for controlling neural inference processor cores is provided, including a compound instruction set architecture. The device comprises an instruction memory, which comprises a plurality of instructions for controlling a neural inference processor core. Each of the plurality of instructions comprises a control operation. The device further comprises a program counter. The device further comprises at least one loop counter register. The device is adapted to execute the plurality of instructions. Executing the plurality of instructions comprises: reading an instruction from the instruction memory based on a value of the program counter; updating the at least one loop counter register according to the control operation of the instruction; and updating the program counter according to the control operation of the instruction and a value of the at least one loop counter register.