The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2022

Filed:

May. 28, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Gao-Ming Wu, Hsinchu, TW;

Han-Ting Tsai, Kaoshiung, TW;

Chung-Te Lin, Tainan, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/22 (2006.01); H01L 43/02 (2006.01); H01L 23/522 (2006.01); G11C 5/06 (2006.01); G11C 5/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/222 (2013.01); G11C 5/025 (2013.01); G11C 5/06 (2013.01); H01L 23/5226 (2013.01); H01L 43/02 (2013.01);
Abstract

A semiconductor structure, comprising a substrate and an interconnect layer disposed over a substrate and extending across a memory region and a logic region. The interconnect layer comprises a plurality of tower structures disposed in the interconnect layer within the memory region. Each tower structure comprises at least one metal interconnect structure and a magnetic tunnel junction (MTJ) structure stacked on the metal interconnect structure. The plurality of tower structures are arranged on the substrate in a XY staggered pattern. The at least one metal interconnect structure and the magnetic tunnel junction (MTJ) structure in each tower structure are substantially symmetric along a stacking direction.


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