The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2022

Filed:

Jan. 27, 2017
Applicants:

Soitec, Bernin, FR;

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Inventors:

Eric Guiot, Goncelin, FR;

Aurelie Tauzin, Saint-Egréve, FR;

Thomas Signamarcheix, Grenoble, FR;

Emmanuelle Lagoutte, St. Marcellin, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/043 (2014.01); H01L 31/18 (2006.01); H01L 31/0725 (2012.01); H01L 31/054 (2014.01); H01L 21/18 (2006.01); H01L 31/0735 (2012.01);
U.S. Cl.
CPC ...
H01L 31/043 (2014.12); H01L 21/187 (2013.01); H01L 31/0547 (2014.12); H01L 31/0725 (2013.01); H01L 31/0735 (2013.01); H01L 31/1896 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/81895 (2013.01); H01L 2224/82896 (2013.01);
Abstract

An engineered substrate comprising: a seed layer made of a first semiconductor material for growth of a solar cell; a first bonding layer on the seed layer; a support substrate made of a second semiconductor material; a second bonding layer on a first side of the support substrate; a bonding interface between the first and second bonding layers; the first and second bonding layers each made of metallic material; wherein doping concentration and thickness of the engineered substrate, in particular, of the seed layer, the support substrate, and both the first and second bonding layers, are selected such that the absorption of the seed layer is less than 20%, preferably less than 10%, as well as total area-normalized series resistance of the engineered substrate is less than 10 mOhm·cm, preferably less than 5 mOhm·cm.


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