The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2022

Filed:

Apr. 13, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Sunglyong Kim, Allen, TX (US);

Seetharaman Sridhar, Richardson, TX (US);

Sameer Pendharkar, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0882 (2013.01); H01L 21/26513 (2013.01); H01L 29/0623 (2013.01); H01L 29/1045 (2013.01); H01L 29/66659 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01); H01L 29/7835 (2013.01); H01L 29/1083 (2013.01); H01L 29/402 (2013.01); H01L 29/42368 (2013.01);
Abstract

A semiconductor device includes a MOS transistor located within a semiconductor substrate of a first conductivity type. The transistor includes a body well located between a drain well and a substrate contact well. A buried voltage blocking region of a second conductivity type is located within the substrate and is connected to the body well. The buried voltage blocking region extends toward the substrate contact well, with an unmodified portion of the substrate remaining between the voltage blocking region and the substrate contact well.


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