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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11239109 B1

PDFFull Text
Date of Patent:
Feb. 01, 2022

Filed:

Jul. 26, 2018

Semiconductor memory having reduced interference between bit lines and word lines

Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Shengfen Chiu, Shanghai, CN;

Liang Chen, Shanghai, CN;

Liang Han, Shanghai, CN;

Assignees:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Attorney:

Anova Law Group, PLLC

Primary Examiner:

S M Sohel Imtiaz

Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 21/764 (2006.01); H01L 27/11521 (2017.01); H01L 21/311 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 21/768 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 21/764 (2013.01); H01L 21/31111 (2013.01); H01L 21/768 (2013.01); H01L 21/823481 (2013.01); H01L 27/11521 (2013.01); H01L 29/0649 (2013.01); H01L 29/42324 (2013.01); H01L 29/4991 (2013.01); H01L 29/515 (2013.01);
Abstract

A flash memory device includes a substrate, a plurality of active regions and a plurality of first isolation regions alternately arranged in a first direction and extending in a second direction different from the first direction, a plurality of gate structures on the substrate, the gate structures being spaced apart from each other and extending in the second direction, a gap structure between the gate structures, and a second isolation region filling an upper portion of the gap structure and leaving a first air gap in a lower portion of the gap structure.

Find Patent Forward Citations

Chiu, Shengfen. (2022). Semiconductor memory having reduced interference between bit lines and word lines (U.S. Patent No. 11239109). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11239109

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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