The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2022
Filed:
Nov. 24, 2020
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Yung-Hsu Chuang, Hsinchu, TW;
Wen-Shen Chou, Hsinchu County, TW;
Jie-Ren Huang, Hsinchu, TW;
Yu-Tao Yang, Hsinchu County, TW;
Yung-Chow Peng, Hsinchu, TW;
Yun-Ru Chen, Keelung, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Abstract
A method for fabricating an integrated circuit is provided. The method includes: receiving a cell schematic of a unit cell of the integrated circuit; when an intrinsic gain of a transistor of the unit cell falls outside a predetermined range of gain values, revising a set of parameter values for a set of size parameters of the unit cell in the cell schematic, wherein the intrinsic gain of the transistor of the unit cell characterized by the revised set of parameter values falls within the predetermined range of gain values; generating a cell layout of the unit cell according to the cell schematic indicating the revised set of parameter values for the set of size parameters; and fabricating the integrated circuit according to the cell layout of the unit cell.