The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2022
Filed:
Jan. 15, 2020
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Wei-Cheng Wu, Hsinchu County, TW;
Chih-Ren Hsieh, Changhua County, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/26 (2006.01); H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/788 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 21/285 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7881 (2013.01); H01L 21/26513 (2013.01); H01L 21/28518 (2013.01); H01L 29/0653 (2013.01); H01L 29/40114 (2019.08); H01L 29/42328 (2013.01); H01L 29/45 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/66825 (2013.01); H01L 29/7851 (2013.01);
Abstract
A memory device includes a semiconductor fin, a floating gate, a control gate, a source region, an erase gate, and a select gate. The floating gate is above and conformal to the semiconductor fin. The control gate is above the floating gate. The source region is in the semiconductor fin. The erase gate is above the source region and adjacent the control gate. The select gate is above the semiconductor fin. The control gate is between the erase gate and the select gate.