The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2022

Filed:

Aug. 15, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Michael Behar, Zichron Yaakov, IL;

Moshe Maor, Kiryat Mozking, IL;

Ronen Gabbai, Ramat Hashofet, IL;

Roni Rosner, Binyamina, IL;

Zigi Walter, Haifa, IL;

Oren Agam, Zichron Yaacov, IL;

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 9/50 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5016 (2013.01); G06F 3/0613 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 9/505 (2013.01);
Abstract

Methods, apparatus, systems and articles of manufacture are disclosed that enable out-of-order pipelined execution of static mapping of a workload to one or more computational building blocks of an accelerator. An example apparatus includes an interface to load a first number of credits into memory; a comparator to compare the first number of credits to a threshold number of credits associated with memory availability in a buffer; and a dispatcher to, when the first number of credits meets the threshold number of credits, select a workload node of the workload to be executed at a first one of the one or more computational building blocks.


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