The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Sep. 18, 2019
Applicant:

Elpis Technologies Inc., Ottawa, CA;

Inventors:

Lawrence A. Clevenger, Lagrangeville, NY (US);

Baozhen Li, South Burlington, VT (US);

Xiao H. Liu, Briarcliff Manor, NY (US);

Kirk D. Peterson, Jericho, VT (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76831 (2013.01); H01L 21/76802 (2013.01); H01L 21/76805 (2013.01); H01L 21/76829 (2013.01); H01L 21/76832 (2013.01); H01L 21/76834 (2013.01); H01L 23/5226 (2013.01); H01L 23/5329 (2013.01); H01L 23/53295 (2013.01); H01L 23/53238 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor structure and a process for forming a semiconductor structure. There is a back end of the line wiring layer which includes a wiring line, a multilayer cap layer and an ILD layer. A metal-filled via extends through the ILD layer and partially through the cap layer to make contact with the wiring line. There is a reliability enhancement material formed in one of the layers of the cap layer. The reliability enhancement material surrounds the metal-filled via only in the cap layer to make a bottom of the metal-filled via that contacts the wiring line be under compressive stress, wherein the compressive reliability enhancement material has different physical properties than the cap layer.


Find Patent Forward Citations

Loading…