The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Apr. 24, 2020
Applicant:

Hon Hai Precision Industry Co., Ltd., New Taipei, TW;

Inventors:

Shiang-Ruei Ouyang, New Taipei, TW;

Wei-Cheng Chen, New Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1333 (2006.01); G02F 1/1362 (2006.01); G03B 30/00 (2021.01); G06F 1/16 (2006.01); H01L 23/522 (2006.01); H01L 27/12 (2006.01); G02F 1/136 (2006.01); G02F 1/1335 (2006.01); G02F 1/13357 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G03B 30/00 (2021.01); G06F 1/1637 (2013.01); G06F 1/1686 (2013.01); H01L 23/5222 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); G02F 1/13606 (2021.01); G02F 1/133388 (2021.01); G02F 1/133514 (2013.01); G02F 1/133602 (2013.01); G02F 1/136213 (2013.01); H01L 27/1244 (2013.01);
Abstract

An array substrate carrying a display area and a camera area surrounded by the display area provides connections to both areas free of electrical interference. The camera area includes a transparent area and a routing area surrounding the transparent area. The array substrate includes a first conductive layer and a second conductive layer. The first conductive layer includes first wires and first capacitance compensation patterns. The second conductive layer includes second wires. Each first capacitance compensation pattern is between adjacent first wires. Along a thickness direction of the array substrate, a projection of each first capacitance compensation pattern on the substrate overlaps with a projection of at least one second wire. A display panel and a display device are also disclosed.


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