The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2022

Filed:

Aug. 20, 2019
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Dean E. Probst, West Jordan, UT (US);

Peter A. Burke, Portland, OR (US);

Prasad Venkatraman, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 21/765 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7811 (2013.01); H01L 21/765 (2013.01); H01L 29/404 (2013.01); H01L 29/407 (2013.01); H01L 29/4238 (2013.01); H01L 29/42368 (2013.01); H01L 29/66348 (2013.01); H01L 29/66734 (2013.01); H01L 29/7397 (2013.01); H01L 29/7813 (2013.01);
Abstract

In one embodiment, a semiconductor device is formed having a plurality of active trenches formed within an active region of the semiconductor device. A first insulator is formed along at least a portion of sidewalls of each active trench. A perimeter termination trench is formed that surrounds the active region. The perimeter termination trench is formed having a first sidewall that is adjacent the active region and a second sidewall that is opposite the first sidewall. An insulator is formed along the second sidewall that has a thickness is greater than an insulator that is formed along the first sidewall.


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