The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Feb. 18, 2020
Ansys, Inc., Canonsburg, PA (US);
Sooyong Kim, Palo Alto, CA (US);
Wenliang Zhang, San Jose, CA (US);
Xiaoqin Liu, San Jose, CA (US);
Yaowei Jia, San Jose, CA (US);
ANSYS, Inc., Canonsburg, PA (US);
Abstract
Data is received that characterizes an integrated circuit and which includes a plurality of Standard Test Interface Language (STIL) codes and at least one file defining physical and/or logical parameters of the integrated circuit. Thereafter, using the received data, a power integrity analysis of the integrated circuit is performed to estimate power induced noise in a double glitch capture mode. Data is then provided that characterizes the performed double glitch capture mode power integrity analysis of the integrated circuit. Related apparatus, systems, techniques and articles are also described.