The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Jul. 30, 2020
Cadence Design Systems, Inc., San Jose, CA (US);
CADENCE DESIGN SYSTEMS, INC., San Jose, CA (US);
Abstract
A computer implemented method for functional safety verification includes simulating SA0 and/or SA1 faults at a Q output port of each sequential element in a first representation of an electronic design, to determine whether any of the simulated faults is detectable by a safety mechanism, determining, based on one or more fault relation rules and based on a second gate-level representation of the electronic design, whether any of the faults is also detectable by the safety mechanism if occurred at one or more input ports of the respective sequential element or one or more input ports of a clockgate of the respective sequential element, and identifying a remainder of input ports and input ports of a clockgate of each of the sequential elements at which the faults are not determined to be detectable by the safety mechanism based on the one or a plurality of fault relation rules.