The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Dec. 05, 2019
Applicant:

Globalfoundries U.s. Inc., Santa Clara, CA (US);

Inventors:

Sunil K. Singh, Mechanicville, NY (US);

Eswar Ramanathan, Mechanicville, NY (US);

Assignee:

GlobalFoundries U.S. Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 49/02 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 28/91 (2013.01); H01L 21/76885 (2013.01); H01L 23/5223 (2013.01); H01L 28/55 (2013.01);
Abstract

A capacitor structure for an integrated circuit (IC) is provided. The capacitor structure includes a plurality of spaced metal pillars with each metal pillar positioned on a corresponding underlying metal wire of an underlying metal layer. A metal-insulator-metal layer is positioned over and between the metal pillars. At least one contact is operatively coupled to a first metal pillar of the plurality of metal pillars. The metal-insulator-metal layer creates a MIM capacitor that undulates over the metal pillars, creating a higher density capacitance compared to conventional planar MIM capacitors. The metal pillars extend into the metal-insulator-metal layer, which reduces contact resistance. The capacitor structure can be integrated into an IC with no major integration issues. A related method is also provided.


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