The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Dec. 17, 2019
Applicants:

Shiann-tsong Tsai, Hsinchu, TW;

Hsien-chou Tsai, Taipei, TW;

Hsien-wei Tsai, Taipei, TW;

Yen-mei Tsai Huang, Taipei, TW;

Inventors:

Chung-Che Tsai, Taipei, TW;

Hsien-Chou Tsai, Taipei, TW;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/528 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/49872 (2013.01); H01L 23/5286 (2013.01); H01L 23/66 (2013.01);
Abstract

A semiconductor package includes a substrate having a semiconductor chip disposed on a top surface of the substrate, a ground ring surrounding the semiconductor chip on the top surface of the substrate, a metal-post reinforced glue wall disposed on the ground ring to surround the semiconductor chip, and a molding compound disposed only inside the metal-post reinforced glue wall and covering the semiconductor chip. The metal-post reinforced glue wall comprises a magnetic or magnetizable filler so as to form an active electro-magnetic compatibility (EMC) shielding.


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