The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jun. 26, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Andrea Vigilante, Milan, IT;

Gianluca Scalisi, Castelverde, IT;

Andrea Pozzato, Paderno Dugnano, IT;

Andrea Salvioni, Muggio, IT;

Mauro Luigi Sali, Sant'Angelo Lodigiano, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/38 (2006.01); G11C 29/36 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/26 (2006.01); G01R 31/319 (2006.01); G11C 29/12 (2006.01); G01R 31/70 (2020.01); G06F 11/22 (2006.01); G01R 31/27 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); G11C 16/0483 (2013.01); G11C 29/36 (2013.01); G01R 31/275 (2013.01); G01R 31/319 (2013.01); G01R 31/70 (2020.01); G06F 11/221 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 29/12005 (2013.01); G11C 2216/18 (2013.01);
Abstract

A variety of applications can include systems and methods that include a memory system tester having an analyzer coupled to a test flow controller. The test flow controller can be arranged to generate test signals to a memory system with the analyzer arranged to couple to test pads of a package platform for the memory system. The analyzer can provide data to the test flow controller to conduct testing and/or debugging of the memory system, with the data based on real time monitoring of the test pads of the package platform. In various embodiments, the analyzer can provide data feedback to the test flow controller in real time such that the test flow controller can control the flow of test signals to the memory system in real time. Additional apparatus, systems, and methods are disclosed.


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