The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2021

Filed:

Nov. 14, 2019
Applicant:

Shinko Electric Industries Co., Ltd., Nagano, JP;

Inventors:

Kenichi Mori, Nagano, JP;

Takehito Terasawa, Nagano, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 24/45 (2013.01); H05K 1/028 (2013.01); H05K 1/0224 (2013.01); H05K 1/0298 (2013.01); H05K 1/181 (2013.01);
Abstract

A wiring substrate includes: a plurality of wiring layers; and a plurality of insulating layers. The wiring substrate includes: a mounting region on which an electronic component is to be mounted; and a non-mounting region on which no electronic component is to be mounted and which is configured to be bent in a first direction. At least one of the wiring layers comprises a shield pattern. The shield pattern disposed in the non-mounting region is defined by a plurality of through holes arranged at predetermined intervals. Each of the through holes has a bent portion bent in plan view.


Find Patent Forward Citations

Mori, Kenichi. (2021). Wiring substrate and semiconductor device (U.S. Patent No. 11205632). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11205632

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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