The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2021
Filed:
Apr. 02, 2020
Intel Corporation, Santa Clara, CA (US);
Vedvyas Shanbhogue, Austin, TX (US);
Krystof C. Zmudzinski, Forest Grove, OR (US);
Carlos V. Rozas, Portland, OR (US);
Francis X. McKeen, Portland, OR (US);
Raghunandan Makaram, Northborough, MA (US);
Ilya Alexandrovich, Haifa, IL;
Ittai Anati, Haifa, IL;
Meltem Ozsoy, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Secure memory repartitioning technologies are described. Embodiments of the disclosure may include a processing device including a processor core and a memory controller coupled between the processor core and a memory device. The memory device includes a memory range including a section of convertible pages that are convertible to secure pages or non-secure pages. The processor core is to receive a non-secure access request to a page in the memory device, responsive to a determination, based on one or more secure state bits in one or more secure state bit arrays, that the page is a secure page, insert an abort page address into a translation lookaside buffer, and responsive to a determination, based on the one or more secure state bits in the one or more secure state bit arrays, that the page is a non-secure page, insert the page into the translation lookaside buffer.