The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2021

Filed:

Nov. 13, 2017
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Gagan Vishal Jain, Milpitas, CA (US);

Johnson Adaikalasamy, Sunnyvale, CA (US);

Alexander John Wakefield, Fort Lauderdale, FL (US);

Ritesh Mittal, Sunnyvale, CA (US);

Solaiman Rahim, San Francisco, CA (US);

Olivier Coudert, San Francisco, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06F 30/331 (2020.01);
U.S. Cl.
CPC ...
G06F 11/3652 (2013.01); G06F 11/3636 (2013.01); G06F 11/3656 (2013.01); G06F 30/331 (2020.01);
Abstract

A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.


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