The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2021
Filed:
Jan. 14, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventor:
Shekoufeh Qawami, El Dorado Hills, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/07 (2006.01); G06F 3/06 (2006.01); G06F 9/54 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 11/1044 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0688 (2013.01); G06F 9/30098 (2013.01); G06F 9/542 (2013.01); G06F 9/546 (2013.01); G06F 11/076 (2013.01); G06F 11/0772 (2013.01); G06F 11/1076 (2013.01);
Abstract
A memory device has multiple nonvolatile (NV) memory arrays that collectively store a block of data, with each array to store a portion of the data block. A selected NV memory array stores a write count for the block of data. In response to a write command, the NV memory arrays that store data perform an internal pre-write read. The selected NV memory array that stores the write count will perform a pre-write read of the write count, increment the write count internally to the selected NV memory array, and write the incremented write count back to the selected NV memory array.