The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2021
Filed:
Nov. 20, 2019
United Microelectronics Corp., Hsin-Chu, TW;
Hui-Lin Wang, Taipei, TW;
Po-Kai Hsu, Tainan, TW;
Hung-Yueh Chen, Hsinchu, TW;
Chen-Yi Weng, New Taipei, TW;
Si-Han Tsai, Taichung, TW;
Jing-Yin Jhang, Tainan, TW;
Yu-Ping Wang, Hsinchu, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
A method of fabricating a semiconductor device includes the steps of: providing a semiconductor structure including a memory region and a logic region. The semiconductor structure includes a first interlayer dielectric and at least one magnetoresistive random access memory (MRAM) cell disposed on the first interlayer dielectric, and the MRAM cell is disposed in the memory region; depositing a second interlayer dielectric covering the first interlayer dielectric and the at least one MRAM cell; depositing a mask layer conformally covering the second interlayer dielectric; perform a planarization process to remove the mask layer in the memory region; after the step of performing the planarization process, removing the mask layer in the logic region.