The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

May. 23, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Scott L. Light, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 27/11502 (2017.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1087 (2013.01); H01L 27/1085 (2013.01); H01L 27/10805 (2013.01); H01L 27/10817 (2013.01); H01L 27/10829 (2013.01); H01L 27/10847 (2013.01); H01L 27/11502 (2013.01); H01L 28/86 (2013.01); H01L 28/87 (2013.01); H01L 28/88 (2013.01);
Abstract

A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.


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