The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2021
Filed:
Apr. 02, 2018
Intel Corporation, Santa Clara, CA (US);
Chytra Pawashe, Beaverton, OR (US);
Daniel Pantuso, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of the present disclosure describe techniques for reducing in-plane distortion from wafer to wafer bonding using a dummy wafer. One embodiment is an apparatus formed using a dummy wafer, the apparatus comprising: a device layer fusion bonded to a first side of a carrier wafer, wherein the dummy wafer comprises a first wafer and the carrier wafer comprises a second wafer that is different than the first wafer; wherein the device layer comprise a portion of a third wafer that is different than the second wafer; and wherein a second opposite side of the carrier wafer includes: a removal process artifact, wherein a distortion signature present in the portion of the second wafer is indicative of the use of the dummy wafer fusion bonded to the second side of the carrier wafer, or a remainder of the dummy wafer. Other embodiments may be disclosed and/or claimed.