The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2021
Filed:
May. 28, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Altug Koker, El Dorado Hills, CA (US);
Louis Feng, San Jose, CA (US);
Tomasz Janczak, Gdansk, PL;
Andrew T. Lauritzen, Victoria, CA;
David M. Cimini, Orangevale, CA (US);
Abhishek R. Appu, El Dorado Hills, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/36 (2006.01); G09G 3/00 (2006.01); G06F 9/52 (2006.01); G06F 9/30 (2018.01); G06T 1/60 (2006.01); G02B 27/01 (2006.01); G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G09G 5/363 (2013.01); G02B 27/017 (2013.01); G06F 9/3004 (2013.01); G06F 9/522 (2013.01); G06F 12/0828 (2013.01); G06T 1/60 (2013.01); G09G 3/002 (2013.01); G02B 2027/014 (2013.01); G06F 2212/621 (2013.01); G09G 2360/06 (2013.01); G09G 2360/08 (2013.01); G09G 2370/16 (2013.01);
Abstract
Systems, apparatuses and methods may provide for technology that detects a memory fence in a thread, adds a group identifier to one or more memory operations in the thread that follow the memory fence, and sends the one or more memory operations and the group identifier to a memory structure. In one example, the group identifier is used to track completion of the one or more memory operations.