The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

Sep. 01, 2020
Applicant:

Aac Acoustic Technologies (Shenzhen) Co., Ltd., Shenzhen, CN;

Inventors:

Wooicheang Goh, Singapore, SG;

Lieng Loo, Singapore, SG;

Kahkeen Lai, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81C 1/00 (2006.01); B81B 3/00 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00968 (2013.01); B81B 3/0008 (2013.01); B81B 3/0013 (2013.01); B81B 3/0016 (2013.01); B81B 2201/0235 (2013.01); B81C 1/00984 (2013.01); B81C 1/00992 (2013.01); B81C 2201/11 (2013.01); B81C 2201/115 (2013.01);
Abstract

Provided are a method for preparing a silicon wafer with a rough surface and a silicon wafer, for solving the problem that a viscous force is likely to be generated when a smooth surface of the silicon wafer approaches another film layer. The method includes: depositing a porous oxide film layer on a surface of the first silicon planar layer that has been subjected to planar planarization, and then etching the porous oxide film layer by XeFvapor etching, during which XeFgas passes through the porous oxide film layer to etch the first silicon planar layer in an irregular way. Therefore, the first silicon planar layer has a greater surface roughness. When the silicon wafer approaches to another film layer, the viscous force generated therebetween is reduced, improving the sensitivity of the MEMS device and reducing the probability of out-of-work MEMS devices.


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