The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2021

Filed:

Oct. 25, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

David G. Springberg, Fort Collins, CO (US);

David Sluiter, Superior, CO (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01); H03M 13/11 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0656 (2013.01); G06F 3/0619 (2013.01); G06F 3/0685 (2013.01); G06F 11/1068 (2013.01); G06F 12/0253 (2013.01); G11C 29/52 (2013.01); H03M 13/1102 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/7205 (2013.01);
Abstract

Described herein are embodiments related to a two-stage hybrid memory buffer for multiple streams in memory sub-systems. A processing device determines that first write data of a first stream stored in a host buffer component satisfies a threshold to program a first programming unit. The processing device transfers the first write data to the staging buffer component from the host buffer component, and writes the first write data from the staging buffer component as the first programming unit to a first die of multiple non-volatile memory (NVM) dies. The processing device determines that second write data of a second stream satisfies a threshold to program a second programming unit, transfers the second write data to the staging buffer component from the host buffer component, and writes the second write data from the staging buffer component as the second programming unit to a second die of the multiple NVM dies.


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