The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2021

Filed:

Jun. 03, 2020
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Hak Gu Kim, Suwon-si, KR;

Ho Kyung Kang, Suwon-si, KR;

Seong Jong Cheon, Suwon-si, KR;

Young Sik Hur, Suwon-si, KR;

Jin Seon Park, Suwon-si, KR;

Yong Duk Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 5/35 (2015.01); H01Q 9/04 (2006.01); H01Q 1/38 (2006.01); H01Q 1/22 (2006.01);
U.S. Cl.
CPC ...
H01Q 9/0414 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/38 (2013.01); H01Q 5/35 (2015.01);
Abstract

A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.


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