The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2021

Filed:

Mar. 02, 2016
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Hirokazu Seki, Oita, JP;

Go Asayama, Kanagawa, JP;

Kiyoharu Momosaki, Oita, JP;

Rei Takamori, Oita, JP;

Masakazu Baba, Oita, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 5/335 (2011.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14618 (2013.01); H01L 21/563 (2013.01); H01L 23/3114 (2013.01); H01L 23/3135 (2013.01); H01L 27/14683 (2013.01); H04N 5/335 (2013.01); H01L 24/16 (2013.01); H01L 24/73 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/83104 (2013.01);
Abstract

A size reduction of an image pickup module by using resin molding, including a reduction in height, area, or the like thereof is achieved in an actual product. Provided is a module, including a substrate; a semiconductor component in which a first surface of a semiconductor device manufactured by chip-size packaging is provided and fixed along a plate-shaped translucent member, and a second surface of the semiconductor device is fixed with the second surface caused to face the substrate; a frame portion made of resin and formed on the substrate to surround the semiconductor component; and an interposition member which is made of resin and with which a gap between the semiconductor component and the substrate is filled. The interposition member is connected and fixed to the frame portion to be integrated therewith.


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