The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2021

Filed:

May. 19, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Yen-Pin Chen, Taipei, TW;

Tzu-Hen Lin, Hsinchu, TW;

Tai-Yu Cheng, Pingtung, TW;

Florentin Dartu, Austin, TX (US);

Chung-Hsing Wang, Hsinchu County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/367 (2020.01); G06F 111/20 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/367 (2020.01); G06F 2111/20 (2020.01); G06F 2119/12 (2020.01);
Abstract

A method for timing optimization is disclosed. The method includes obtaining information on timing of paths in a chip, the information including a mean of slacks and a sigma of slacks of each of the paths; determining a sigma margin (SM) value each of the paths, the SM value being obtained by dividing the mean by the sigma; dividing the paths into groups based on SM values, an SM value of a path in one of the groups being different from that of a path in another one of the groups; and determining a yield requirement that indicates the maximum number of paths allowable in each group in order to achieve a predetermined yield.


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