The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

May. 15, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chia-Hui Chen, Hsinchu, TW;

Wan-Yen Lin, Kaohsiung, TW;

Chia-Jung Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/185 (2006.01); H03K 3/037 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0377 (2013.01); H03K 19/018521 (2013.01);
Abstract

A circuit includes a first inverter and a second inverter. The first inverter is coupled to an input terminal. The input terminal receives an input signal varying in a first voltage domain. The second inverter is coupled between the first inverter and an output terminal. The second inverter generates an output signal varying in a second voltage domain. The first inverter includes a first PMOS transistor and a first NMOS transistor. The first PMOS transistor is biased by a first input tracking signal generated from the input signal. The first input tracking signal varies in a third voltage domain. The first NMOS transistor is biased by a second input tracking signal generated from the input signal. The second input tracking signal varies in the second voltage domain.


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