The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Feb. 05, 2020
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Jun Yang, Jiangsu Province, CN;

Wei-Xiong He, Jiangsu Province, CN;

Jian Liu, Jiangsu Province, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/32 (2006.01); H03G 3/30 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3211 (2013.01); H03F 1/3205 (2013.01); H03F 3/45179 (2013.01); H03G 3/30 (2013.01); H03F 2201/3215 (2013.01);
Abstract

A gain modulation circuit includes a load circuit, a differential circuit, a current source, a resistor, a first transistor, and a detector circuit. The load circuit is configured to receive a supply voltage. The differential circuit is coupled to the load circuit. The differential circuit and the load circuit are configured to generate a pair of output voltages according to a pair of input voltages and the supply voltage. The current source is coupled to the differential circuit. The resistor is coupled to the differential circuit and the current source. The first transistor is coupled to the differential circuit. The detector circuit is configured to generate a detection signal according to the pair of input voltages. A turned-on degree of the first transistor is adjusted based on the detection signal, to adjust a linear region of the gain modulation circuit.


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