The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Jun. 25, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Sheng-Hsiung Chen, Zhubei, TW;

Chung-Te Lin, Tainan, TW;

Fong-Yuan Chang, Hsinchu County, TW;

Ho Che Yu, Zhubei, TW;

Li-Chun Tien, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 (2006.01); G06F 30/398 (2020.01); H01L 27/02 (2006.01); H01L 27/118 (2006.01); G06F 30/394 (2020.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 30/394 (2020.01); H01L 27/0207 (2013.01); H01L 27/11807 (2013.01); H01L 2027/11881 (2013.01);
Abstract

Placement methods described in this disclosure provide placement and routing rules where a system implementing the automatic placement and routing (APR) method arranges standard cell structures in a vertical direction that is perpendicular to the fins but parallel to the cell height. Layout methods described in this disclosure also improve device density and further reduce cell height by incorporating vertical power supply lines into standard cell structures. Pin connections can be used to electrically connect the power supply lines to standard cell structures, thus improving device density and performance. The APR process is also configured to rotate standard cells to optimize device layout.


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