The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2021
Filed:
Apr. 20, 2018
Intel Corporation, Santa Clara, CA (US);
Rupin Vakharwala, Hillsboro, OR (US);
Amin Firoozshahian, Mountain View, CA (US);
Stephen Van Doren, Portland, OR (US);
Rajesh Sankaran, Portland, OR (US);
Mahesh Madhav, Portland, OR (US);
Omid Azizi, Redwood City, CA (US);
Andreas Kleen, Portland, OR (US);
Mahesh Maddury, Santa Clara, CA (US);
Ashok Raj, Portland, OR (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
A processing device includes a core to execute instructions, and memory management circuitry coupled to, memory, the core and an I/O device that supports page faults. The memory management circuitry includes an express invalidations circuitry, and a page translation permission circuitry. The memory management circuitry is to, while the core is executing the instructions, receive a command to pause communication between the I/O device and the memory. In response to receiving the command to pause the communication, modify permissions of page translations by the page translation permission circuitry and transmit an invalidation request, by the express invalidations circuitry to the I/O device, to cause cached page translations in the I/O device to be invalidated.