Apparatuses, systems, and methods for data strobe write timing

Abstract

Apparatuses, systems, and methods for data strobe write timing. A memory device may receive a data strobe clock signal and serial write data during a write operation. A deserializer circuit of the memory may convert the serial write data into parallel write data using timing based on the data strobe clock signal. For example, one or more internal signals may be generated based on the data strobe clock signal and used to activate various operations of the deserializer circuit. The data strobe clock signal may also be used to activate bit lines of the memory device in order to write the parallel write data to memory cells along those activated bit lines. The memory may also receive a system clock, separate from the data strobe clock signal, which may be used for other operations of the memory. For example, in a read operation, the bit lines may be activated with timing based on the system clock.