The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2021

Filed:

Jul. 01, 2020
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventor:

Hitoshi Ikeda, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G11C 11/4076 (2006.01); G11C 11/409 (2006.01); G11C 5/02 (2006.01); G11C 11/4074 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40615 (2013.01); G11C 5/025 (2013.01); G11C 11/409 (2013.01); G11C 11/4074 (2013.01); G11C 11/4076 (2013.01); G11C 2207/2272 (2013.01);
Abstract

A memory system and an operating method thereof are provided. The memory system includes a plurality of pseudo static random access memory chips and a memory controller. The pseudo static random access memory chips are coupled to each other. When receiving an action command, each of the pseudo static random access memory chips determines whether a refresh collision occurs in itself, and generates a collision signal accordingly. The memory controller controls the pseudo static random access memory chips according to the collision signal. All of the pseudo static random access memory chips share their respective collision signals to perform a same latency synchronously.


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