The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2021

Filed:

May. 04, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Takashi Ando, Tuckahoe, NY (US);

Hiroyuki Miyazoe, White Plains, NY (US);

Seyoung Kim, Weschester, NY (US);

Vijay Narayanan, New York, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 47/00 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01); F01N 3/08 (2006.01); F01N 3/10 (2006.01); F01N 3/20 (2006.01); F01N 9/00 (2006.01); F02D 41/02 (2006.01); F02D 41/04 (2006.01); F02D 41/14 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1633 (2013.01); F01N 3/0814 (2013.01); F01N 3/0842 (2013.01); F01N 3/103 (2013.01); F01N 3/2066 (2013.01); F01N 9/00 (2013.01); F02D 41/0295 (2013.01); F02D 41/042 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/08 (2013.01); H01L 45/1253 (2013.01); F01N 2250/12 (2013.01); F01N 2430/06 (2013.01); F01N 2560/025 (2013.01); F01N 2560/14 (2013.01); F01N 2610/02 (2013.01); F01N 2900/0416 (2013.01); F01N 2900/08 (2013.01); F01N 2900/1402 (2013.01); F01N 2900/1602 (2013.01); F02D 41/1475 (2013.01); F02D 2200/0802 (2013.01); F02D 2200/0804 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); Y02T 10/12 (2013.01); Y02T 10/40 (2013.01);
Abstract

A method is presented for facilitating oxygen vacancy generation in a resistive random access memory (RRAM) device. The method includes forming a RRAM stack having a first electrode and at least one sacrificial layer, encapsulating the RRAM stack with a dielectric layer, constructing a via resulting in removal of the at least one sacrificial layer of the RRAM stack, the via extending to a high-k dielectric layer of the RRAM stack, and forming a second electrode in the via such that the second electrode extends laterally into cavities defined by the removal of the at least one sacrificial layer.


Find Patent Forward Citations

Loading…