The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2021

Filed:

Mar. 14, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hung-Shu Huang, Taichung, TW;

Ming-Chyi Liu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01); H01L 27/1157 (2017.01); H01L 21/311 (2006.01); H01L 21/033 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1157 (2013.01); H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H01L 29/40117 (2019.08); H01L 29/42344 (2013.01); H01L 29/66795 (2013.01); H01L 29/66833 (2013.01); H01L 29/7851 (2013.01); H01L 29/792 (2013.01);
Abstract

A semiconductor device includes a substrate, a fin structure, an insulating layer, a select gate, a memory gate, and a charge trapping layer. The fin structure includes a first portion and a second extend from the substrate. Each of the first portion and the second portion includes a first sidewall and a second sidewall, and the second sidewalls are between the first sidewalls. The insulating layer is disposed between the second sidewalls of the first and second portions. The select gate and the memory gate extend across the fin structure and the insulating layer. The charge trapping layer is disposed between the memory gate and the select gate, between the memory gate and the insulating layer, and between the memory gate and the fin structure, and the second sidewalls of the first and second portions are free from in contact with the charge trapping layer.


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