The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2021

Filed:

Apr. 18, 2019
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Thomas Feil, Villach, AT;

Gerhard Noebauer, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/06 (2006.01); H01L 49/02 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01); H03K 17/081 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H01L 27/0288 (2013.01); H01L 27/0629 (2013.01); H01L 28/20 (2013.01); H01L 28/60 (2013.01); H01L 29/0696 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/4236 (2013.01); H01L 29/7397 (2013.01); H01L 29/7813 (2013.01); H03K 17/08104 (2013.01); H03K 17/08116 (2013.01);
Abstract

Disclosed is an electronic circuit. The electronic circuit includes a first transistor device and a clamping circuit. The first transistor device includes a control node and a load path between a first load node and a second load node, and the clamping circuit includes a second transistor device and a drive circuit. The second transistor device includes a control node and a load path connected in parallel with the load path of the first transistor device, and the drive circuit includes a capacitor coupled between the second load node of the first transistor device, and a first resistor coupled between the control node of the second transistor device and a further circuit node.


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