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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11152313 B1

PDFFull Text
Date of Patent:
Oct. 19, 2021

Filed:

Jul. 30, 2019

Using threading dislocations in gan/si systems to generate physically unclonable functions

Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Hiu Yung Wong, Cupertino, CA (US);

Rimvydas Mickevicius, Fremont, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:

Haynes Beffel & Wolfeld LLP

Andrew L. Dunlap

Primary Examiner:

Errol V Fernandes

Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/06 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/778 (2006.01); H01L 29/861 (2006.01); H01L 29/32 (2006.01); H01L 29/66 (2006.01); H01L 21/8252 (2006.01); H01L 29/872 (2006.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
H01L 23/576 (2013.01); H01L 21/8252 (2013.01); H01L 27/0605 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/32 (2013.01); H01L 29/66136 (2013.01); H01L 29/66143 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/8613 (2013.01); H01L 29/872 (2013.01); H04L 9/3271 (2013.01);
Abstract

The independent claims of this patent signify a concise description of embodiments. Roughly described, a physically unclonable function (PUF) device includes a crystalline substrate and a stack of crystalline layers on top. The stack is grown epitaxially such that lattice mismatch causes threading dislocations from the substrate to the top surface of the stack. Diodes are formed on the top surface by forming anode material on the top surface of the stack, thereby forming a diode junction with a cathode region below. A diode which includes a threading dislocation has a higher leakage current than one that does not. Circuitry connected to the diodes interrogates the array and outputs binary values indicating, for each of the diodes, whether the diode includes a threading dislocation. Such binary values can be used as the PUF of the chip. This Abstract is not intended to limit the scope of the claims.

Find Patent Forward Citations

Wong, Hiu. (2021). Using threading dislocations in gan/si systems to generate physically unclonable functions (U.S. Patent No. 11152313). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11152313

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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