The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 2021

Filed:

Jun. 04, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Yann Mignot, Slingerlands, NY (US);

James J. Kelly, Schenectady, NY (US);

Muthumanickam Sankarapandian, Niskayuna, NY (US);

Yongan Xu, Niskayuna, NY (US);

Hsueh-Chung Chen, Cohoes, NY (US);

Daniel J. Vincent, Albany, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 21/027 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5283 (2013.01); H01L 21/0276 (2013.01);
Abstract

A method for fabricating a semiconductor device includes forming first and second interconnect levels on a substrate with the first and second interconnect levels having respective first and second dielectric layers and first and second patterned metal conductors and where each of the first and second patterned metal conductors includes a first metallic material, depositing a third dielectric layer onto the second first interconnect layer, forming a via opening extending through the third dielectric layer and the second dielectric layer and connecting with the first patterned metal conductor of the first interconnect level and depositing a second metallic material different from the first metallic material into the via opening to form a via The via electrically couples with the patterned metal layer of the first interconnect level.


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