The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2021
Filed:
Oct. 07, 2020
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Po-Chia Lai, Fremont, CA (US);
Ming-Chang Kuo, Qionlin Township, TW;
Jerry Chang Jui Kao, Taipei, TW;
Wei-Ling Chang, Hsinchu, TW;
Wei-Ren Chen, Hsinchu, TW;
Hui-Zhong Zhuang, Kaohsiung, TW;
Stefan Rusu, Sunnyvale, CA (US);
Lee-Chung Lu, Taipei, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes positioning adjacent first through fourth active regions in a cell of an IC layout diagram, the first active region being a first type of an n-type or a p-type and corresponding to a first total number of fins, the second active region being a second type of the n-type or the p-type and corresponding to a second total number of fins, the third active region being the second type and corresponding to a third total number of fins, and the fourth active region being the first type and corresponding to a fourth total number of fins. Each of the first and second total numbers of fins is greater than each of the third and fourth total numbers of fins, and at least one of the positioning the first, second, third, or fourth active regions is performed by a processor.