The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2021

Filed:

Mar. 29, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Aman Bhatia, Los Gatos, CA (US);

Zion S. Kwok, Burnaby, CA;

Justin Kang, Vancouver, CA;

Poovaiah M. Palangappa, San Jose, CA (US);

Santhosh K. Vanaparthy, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/11 (2006.01); G11C 29/52 (2006.01); G06F 11/10 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1108 (2013.01); G06F 11/1012 (2013.01); G06F 11/1068 (2013.01); G11C 29/52 (2013.01); G11C 2029/0411 (2013.01);
Abstract

Examples include techniques to use intrinsic information when implementing a bit-flipping algorithm. An error correction control (ECC) decoder uses the intrinsic information to decode a low density parity count (LDPC) codeword. The intrinsic information including bits of a copy of a received LDPC codeword are compared to bits for variable nodes during an iteration of the bit-flipping algorithm to aid a determination as whether one or more bits for the variable nodes are to be flipped.


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