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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11145677 B1

PDFFull Text
Expired
Date of Patent:
Oct. 12, 2021

Filed:

Nov. 22, 2019

Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Shawn P. Fetterolf, Cornwall, VT (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

Cantor Colburn LLP

Randall Bluestone

Primary Examiner:

Theresa T Doan

Int. Cl.
CPC ...
H01L 27/01 (2006.01); H01L 27/12 (2006.01); H01L 31/0392 (2006.01); H01L 29/06 (2006.01); H01L 21/84 (2006.01); H01L 21/762 (2006.01); H01L 21/3105 (2006.01); H01L 21/02 (2006.01); H01L 29/167 (2006.01); H01L 21/311 (2006.01); H01L 29/08 (2006.01); H01L 29/36 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/02164 (2013.01); H01L 21/31053 (2013.01); H01L 21/7624 (2013.01); H01L 21/84 (2013.01); H01L 29/0649 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01); H01L 29/0847 (2013.01); H01L 29/167 (2013.01); H01L 29/36 (2013.01);
Abstract

According to embodiments of the present invention, a semiconductor device includes a first transistor located on a first fixed charge dielectric layer and a second transistor located on a second fixed charge dielectric layer. The first fixed charge dielectric layer and the second fixed charge dielectric layer are differently charged such that the first transistor and the second transistor have different threshold voltages.

Find Patent Forward Citations

Cheng, Kangguo. (2021). Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages (U.S. Patent No. 11145677). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11145677

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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