The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2021
Filed:
Mar. 21, 2019
Applicant:
Winbond Electronics Corp., Taichung, TW;
Inventor:
Yu-Ming Chen, Taichung, TW;
Assignee:
Winbond Electronics Corp., Taichung, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/14 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01R 4/2407 (2018.01); H01R 12/62 (2011.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/50 (2013.01); H01L 23/4985 (2013.01); H01L 24/13 (2013.01); H01L 25/0657 (2013.01); H01R 4/2407 (2018.01); H01R 12/62 (2013.01); H01L 2224/13016 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13139 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06579 (2013.01);
Abstract
A semiconductor structure includes a substrate, a chip, a plurality of conductive bumps, a flexible printed circuit (FPC) board and a plurality of circuit patterns. The chip is disposed on the substrate and includes a plurality of pads. The conductive bumps are disposed on the pads respectively. The FPC board is connected between the substrate and the chip, and the conductive bumps penetrate through an end of the FPC board. The circuit patterns are disposed on the FPC board and electrically connected to the conductive bumps and the substrate.