Non-volatile computing method in flash memory

Abstract

An in-memory multiply and accumulate circuit includes a memory array, such as a NOR flash array, storing weight values W. A row decoder is coupled to the set of word lines, and configured to apply word line voltages to select word lines in the set. Bit line bias circuits produce bit line bias voltages for the respective bit lines as a function of input values Xon the corresponding inputs. Current sensing circuits are connected to receive currents in parallel from a corresponding multimember subset of bit lines in the set of bit lines, and to produce an output in response to a sum of currents.