The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

Jun. 12, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Olivia Wu, Los Altos, CA (US);

Prashant Arora, Fremont, CA (US);

Jason Ko, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G06F 3/06 (2006.01); G06N 3/08 (2006.01); G06N 3/063 (2006.01); G06N 3/04 (2006.01); G06T 1/60 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/0673 (2013.01); G06N 3/0454 (2013.01); G06N 3/063 (2013.01); G06N 3/08 (2013.01); G06T 1/60 (2013.01);
Abstract

One embodiment provides an apparatus. The apparatus may include memory circuitry to store tensor data representing a tensor. The apparatus may include memory controller circuitry to access the memory circuitry. The apparatus may include processor circuitry to: receive a request for a tensor operation; generate a plurality of sub-commands for the tensor operation; and provide the sub-commands to memory controller circuitry to perform the tensor operation based on instructions contained in one or more of the sub-commands. The instructions contained in one or more of the sub-commands may include identify addresses in memory to access; activate one or more rows in the memory circuitry that correspond to the addresses; and transfer tensor data to and/or from the memory circuitry.


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