The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Jun. 12, 2020
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

James Kai, Santa Clara, CA (US);

Murshed Chowdhury, Fremont, CA (US);

Koichi Matsuno, Fremont, CA (US);

Johann Alsmeier, San Jose, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80006 (2013.01); H01L 2224/80895 (2013.01); H01L 2225/06524 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01);
Abstract

A first wafer including a first substrate, first semiconductor devices overlying the first substrate, and first dielectric material layers overlying the first semiconductor devices is provided. A sacrificial material layer is formed over a top surface of a second wafer including a second substrate. Second semiconductor devices and second dielectric material layers are formed over a top surface of the sacrificial material layer. The second wafer is attached to the first wafer such that the second dielectric material layers face the first dielectric material layers. A plurality of voids is formed through the second substrate. The sacrificial material layer is removed by providing an etchant that etches a material of the sacrificial material layer through the plurality of voids. The substrate is detached from a bonded assembly including the first wafer, the second semiconductor devices, and the second dielectric material layers upon removal of the sacrificial material layer.


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