The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Jul. 10, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Youngcheon Kwon, Hwaseong-si, KR;

Kyomin Sohn, Yongin-si, KR;

Jaeyoun Youn, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/538 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 22/32 (2013.01); H01L 23/5386 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06596 (2013.01);
Abstract

High bandwidth memories and systems including the same may include a buffer die, a plurality of memory dies stacked on the buffer die, a plurality of dummy bump groups in edge regions of the buffer die and the plurality of memory dies, and a plurality of signal line groups. Each of the plurality of dummy bump groups includes dummy bumps spaced apart from each other between each pair of adjacent dies and configured to connect the two adjacent dies to each other. Each of the signal line groups includes a plurality of signal lines configured to transmit a corresponding signal among an input signal and a plurality of bump crack detection signals applied to an input dummy bump of each of the plurality of dummy bump groups via sequential transmission through the plurality of dummy bumps to an output dummy bump during a bump crack test operation.


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