The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Jun. 06, 2019
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventor:

Poren Tang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/033 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823468 (2013.01); H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/76829 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 29/6653 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01);
Abstract

Semiconductor devices and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate; forming at least one gate structure having a gate dielectric layer on a surface of the semiconductor substrate; forming first sidewall spacers on a first sidewall surface region of the gate structure and covering sidewall surfaces of the gate dielectric layer; forming second sidewall spacers on a second sidewall surface region of the gate structure and top surfaces of the first sidewall spacers and made of a material different from a material of the first sidewall spacers; forming conductive plugs in the dielectric layer at both sides of the gate structure, the first sidewall spacers and the second sidewall spacers; and removing the second sidewall spacers to form air gap spacers above the first sidewall spacers and between the second sidewall surface region of the gate structure and the conductive plugs.


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